32-position manual up/down control potentiometer preliminary technical data ad5228 rev. pr e 1/20/2004 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use; nor for any infringements of patents or other rights of third parties, which may result from its us e. no license is granted by implication or otherwise under any patent or patent rights of analog devices one technology way, p.o. box 9106, norwood, ma 02062-9106 u . s . a . tel: 781/329-4700 world wide web site: http://www.analog.com fax: 781/326-8703 ? analog devices, inc., 2004 1 features ? 32-position digital potentiometer ? 10k, 50k, 100k ? end-to-end terminal resistance ? simple manual up/down push button control ? built-in adaptive de-bouncer ? discrete step counts up/down ? fast scan counts up/down 4 steps per seconds ? zeroscale/midscale selectable preset ? low potentiometer mo de tempco 5ppm/ o c ? low rheostat mode tempco 35ppm/ o c ? internal pull-up resistors ? digital control compatible ? low power, i dd = 5 a max ? low operating voltage, 2.7v to 5.5v ? automotive temperature range -40oc to +105oc ? compact thin sot23-8 (2.9 mm 3 mm) package applications ? mechanical potentiometers and trimmers replacements ? lcd contrast, brightness, and backlight controls ? digital volume control ? portable devices level adjustments ? electronics front panel level controls ? programmable power supply general descriptions ad5228 is analog devices latest 32-step up/down control digital potentiometer 1 emulating mechanical potentiometer operation. its simple up/down control interface allows manual control with just two external pushbutton switches. ad5228 designed with a built-in adaptive de-bouncer that ignores any invalid bounces due to the spring-load rebounce mechanism commonly found in pushbuttons during contact closure. the de-b ouncer is adaptive that can accommodate variety of mechanical switches with irregular bouncing mechanisms. in addition, ad5228 can be counted up and down in discrete step or in fast scanning mode. when the pu or pd button is briefly pressed and released, ad5228 resistance changes by one step. repeat pressing and releasing the button change the numbers of steps accordingly. when pu or pd button is held continuously, the device will change to the fast scan mode after 1 second and count 4 steps per second thereafter. in addition to manual control, ad5228 can be controlled digitally and its up/down control features simplify discrete logics or micro- controller control. the up down inputs have internal pull-up resistors which ensure pr oper logic operation. the ad5228 is available in compact thin sot23-8 package. all parts are guaranteed to operate over the automotive temperature range of -40c to +105c. ad5228 simple interface, small footpr int, and very low cost enable it to be the potential replacem ents of mechanical potentiometers and trimmers with typically 3x improved resolution, solid-state reliability, and fast adjustment. these enhancements can result in considerable cost saving in end users systems. for users who consider eemem potentiometers, they may refer to some recommendations in the applications section. functional block diagrams figure 1. ad5228 functional block diagrams table 1. truth table pu pd operation 0 0 r wb and r wa do not change 0 1 r wb increment, r wa decrement 1 0 r wb decrement, r wa increment 1 1 r wb and r wa do not change pin configuration vdd pu pre pd b w gnd a 8 7 6 5 4 3 2 1 sot23-8 figure 2. ad5228 package and pin configuration note.1. the term digital potentiomete r and rdac are used interchangeably .
preliminary technical data ad5228 rev. pr e 1/20/2004 2 table of contents general description ............... error! bookmark not defined. ad5228?specifications........ error! bookmark not defined. absolute maximum ratings ..................................................... 4 thermal resistance............ error! bookmark not defined. pin configurations and functional descriptions........ error! bookmark not defined. typical performance characteristics .. error! bookmark not defined. theory of operation .............. error! bookmark not defined. outline dimensions..................................................................10 esd caution....................... error! bookmark not defined. revision history revision prc: initial version
preliminary technical data ad5228 rev. pr e 1/20/2004 3 table 2. electrical characteristics 10k , 50k, 100k : version (v dd = +3v10% or +5v10%, v a = +v dd , v b = 0v, -40c < t a < +105c unless otherwise noted.) parameter symbol conditions min typ 1 max units dc characteristics rheostat mode resistor differential nl 2 r-dnl r wb , v a =nc -1 0.25 +1 lsb resistor nonlinearity 2 r-inl r wb , v a =nc -1 0.5 +1 lsb nominal resistor tolerance ' r ab /r ab t a = 25c -30 30 % resistance temperature coefficient ( ' r ab /r ab )/ ' t 35 ppm/c wiper resistance r w i w = v dd /r, v dd = 5v 120 200 : wiper resistance r w i w = v dd /r, v dd = 2.7v 200 400 : dc characteristics potentiometer divider mode resolution n 5 bits integral nonlinearity 3 inl ?1 0.5 +1 lsb differential nonlinearity 3,4 dnl ?1 0.1 +1 lsb voltage divider temp coefficient ( ' v w /v w )/ ' t mid-scale 5 ppm/c full-scale error v wfse +16 steps from mid-scale (full-scale) ?2 -0.5 +0 lsb zero-scale error v wzse -16 steps from mid-scale (zero-scale) 0 +0.5 +1 lsb resistor terminals voltage range 5 v a,b,w 0 v dd v capacitance 6 a, b c a,b f = 1 mhz, measured to gnd, mid-scale 45 pf capacitance 6 w c w f = 1 mhz, measured to gnd, mid-scale 60 pf common mode leakage i cm v a = v b = v w 1 na pu & pd inputs input high v ih v dd = +5v 2.4 v input low v il v dd = +5v 0.8 v input current i il v in = 0v or +5v 1 p a input capacitance 6 c il 5 pf power supplies power supply range v dd +2.7 +5.5 v supply current standby i dd_stby v dd = +5v 5 p a supply current active i dd_act v dd = +5v, pu or pd is held 50 p a power dissipation 7 p diss v ih = +5v or v il = 0v, v dd = +5v 25 p w power supply sensitivity pss ?v dd = +5v 10% 0.05 0.15 %/% dynamic characteristics 6,9,10 built-in debounce & settling time t db 10 ms fast scan start time t fss pu or pd is held 1 s fast scan time t fs pu or pd is held 0.25 s bandwidth ?3db bw r ab = 10k/50k/100k : , mid-scale 600/x/y khz total harmonic distortion thd w v a =1vrms + 2v dc, v b = 2v dc, f=1khz 0.05 % resistor noise voltage e n_wb r wb = 5k : , f = 1khz 14 nv?hz notes: 1. typicals represent averag e readings at +25c, v dd = +5v. 2. resistor position nonlinearity error r-in l is the deviation from an ideal value me asured between the maximum resistance and the minimum resistance wiper positions . r-dnl measures the relative step change from ideal between successive tap positions. parts are guaranteed monotonic. s ee figure x xx test circuit. 3. inl and dnl are measured at v w with the rdac configured as a potentiometer divider similar to a voltage output d/a converter. v a = v dd and v b = 0v. 4. dnl specification limits of 1lsb maximum are guaranteed mo notonic operating conditions. see figure xxx test circuit. 5. resistor terminals a,b,w have no limitations on polarity with respect to each other. 6. guaranteed by design and no t subject to production test. 7. p diss is calculated from (i dd x v dd ). cmos logic level inputs resu lt in minimum power dissipation. 8. bandwidth, noise and s ettling time are dependent on the terminal resistance value chosen. the lowest r value results in the fastest settling time and high est bandwidth. the highest r value result in the minimum overall power consumption. 9. all dynamic char acteristics use v dd = +5v. 10. see timing diagram for location of measured values. all input control voltages are specified with t r =t f =1ns(10% to 90% of v dd ) and timed from a voltag e level of 1.6v. switch ing characteristics are measured using both v dd = +5v.
preliminary technical data ad5228 rev. pr e 1/20/2004 4 absolute maximum ratings table 3. ad5228 absolute maximum ratings parameter rating v dd to gnd ?0.3, +7v v a , v b , v w to gnd gnd, v dd maximum current i wb , i wa pulsed i wb continuous (r wb 1 k : , a open) 1 i wa continuous (r wa 1 k : , b open) 1 20ma 5ma 5ma digital input voltage to gnd 0v, v dd operating temperature range ?40c to +105c maximum junction temperature (t j max) 150c storage temperature ?65c to +150c lead temperature (soldering, 10 ? 30 sec) 245c thermal resistance 2 t ja , 230c/w 1 maximum terminal current is bounded by the maximum applied voltage across any two of the a, b, and w terminals at a given resis tance, the maximum current handling of the switches, and the ma ximum power dissipation of the package. v dd = 5 v. stresses above those listed under absolute maximum ratings may ca use permanent damage to the device. this is a stress rating on ly and functional operation of the device at these or any other condition s above those indicated in the operationa l section of this specificatio n is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 package power dissipation = (t j max ? t a ) / t ja pin configurations and functional descriptions vdd pu pre pd b w gnd a 8 7 6 5 4 3 2 1 figure 3. sot23-8 table 3. pin function descriptions pin no. name description 1 pu push up pin. connect to external push button. active low 2 pd push down pin. connect to external push button. active low 3 a resistor terminal a. gnd d v a d v dd 4 gnd common ground 5 w wiper terminal w. gnd d v w d v dd 6 b resistor terminal b. gnd d v b d v dd 7 pre power on preset. tie to ground for mid- scale and v dd for zero-scale presets. do not let pre pin floating 8 v dd positive power supply, +2.7 v to +5.5 v interface timing diagram figure 4.step up r wb in discrete steps
preliminary technical data ad5228 rev. pr e 1/20/2004 5 figure 5. step down r wb in discrete steps figure 6. step up r wb in fast scan mode . figure . ste don r wb in fast scan ode
preliminary technical data ad5228 rev. pr e 1/20/2004 6 operation the ad5228 is a 32-position manual up/down control digital potentiometer with selectable power on preset. ad5228 presets to mid-scale when the pre pin is tied to ground and zero-scale when pre is tied to v dd . floating the pre pin is not allowed. the step up and step down operations require the manipulations of the pu (push up) and pd (push down) pins. these pins have internal pull- up resistors that the pu and pd activate at low. the common practices are applying external pushbuttons or tactile switches as shown in figure 8. because of the spring load re-bounce mechanism in most pushbutton switches, a single pushbutton press can generate numerous boun ces during the contact closure, see figures 9 and 10. figure 8. typical pu shbuttons interface figure 9. typical pushbutton switch initial bouncing figure 10. typical pushbutton switch tail bouncing ad5228 features adaptive de-bounc e function, the de-bouncer works by monitoring and timing a ll the bounces. if the durations, between the bounces, are shorter than 10ms, the de-bouncer ignores the bounces and continues to look for the last bounce. when the off state after a bounce reaches 10ms, the de-bouncer will recognize it as the last bo unce, therefore allows ad5228 to change the resistance by one s tep. the timing requirements are shown in figures 4-7. the ad5228 de-bouncer is carefully designed that is capable to handle most standard pushbutton switches in the market. pressing the pu or pd button once increment or decrement r wb by one step respectively. repeat pressing these buttons separately and discretely for fast adjustment is a llowed provided each press is not faster than 10ms (fast video game players can achieve approximately 40ms per press). on the other hand, ad5228 comes with a fast scan feature such that when pu or pd button is held continuously, the fast scan mode is activated after 1 second and ad5228 will change the resistance 4 steps per second thereafter. the change will stop when it hits at either ends of the resistor string unless the opposite bu tton is pressed. the timing informations given are based on th e typical values which may vary 30%. when both pu and pd buttons are pressed simultaneously, the output will not change but it will change once one button is let go earlier than another.
preliminary technical data ad5228 rev. pr e 1/20/2004 7 r s d0 d1 d2 d3 d4 rdac up/ down ctrl& decode a b w r s r s r s r s =r ab /64 r w figure 11. ad5228 equivalent rdac circuit programming te digital potentiometers rheostat operation if only the w-to-b or w-to-a terminals are used as variable resistor the unused terminal can be opened or shorted with w such operation is called rheostat mode figure 12. figure 12. rheostat mode configuration the end-to-end resistance r ab has 32 contact points accessed by the wiper terminal plus th e b terminal contact if r wb is used. pushing the pu pin discretely increments r wb by one step from b to w. the total resistance becomes rs rw see figure 11. the change of resistance r wb can be determined by the number of discrete pu executions provided its maximum and minimum settings are not reached. the r wb can therefore be approximated as w ab wb r r r 32 pu (1) ? 1 ? ? ' w ab wb r r r 32 pd (2) where: pu is the number of discrete push up executions. pd is the number of discrete push down executions r ab is the end-to-end resistance. r w is the wiper resistance contributed by the on-resistance of the internal switch. similar to the mechanical potentiometer, the resistance of the rdac between the wiper w and terminal a also produces a complementary resistance r wa . when these terminals are used, the b-terminal can be opened or shorted to w. the r wa can also be approximated if its maximum and minimum settings are not reached. ? 1 ? ' w ab wa r r r 32 ) 32 ( pu (3) ? 1 ? ' w ab wa r r r 32 ) 32 ( pd (4) equations 1 to 4 do not apply when pu and pd = 0. since in the lowest end of the resistor string, a finite wiper resistance of 60 : is present. care should be taken to limit the current flow between w and b in this state to a maximum pulse current of no more than 20 ma. otherwise, degradation or possible destruction of the internal switch contact can occur. the typical distribution of the resistance tolerance from device to device is process lot dependent and is possible to have 30% tolerance. potentiometer mode operation if all three terminals are used, the operation is called the potentiometer mode. the most common configuration is the voltage divider operation, figure 13. figure 13. potentiometer mode configuration the transfer function is a w ab w ab w v r r r r v 2 32 ' pu (5) if we ignore the effect of the wiper resistance, the transfer function simplifies to a w v v 32 pu ' (6) a w v v 32 pd ' (7)
preliminary technical data ad5228 rev. pr e 1/20/2004 8 unlike in rheostat mode operation where the absolute tolerance is high, potentiometer mode operation yields an almost ratio-metric function of pu /32 or pd /32 with a relatively small error contributed by the r w terms, the tolerance effect is therefore almo st cancelled. although the thin film step resistor r s and cmos switches resistance r w have very different temperature coefficients, the ratio-metric adjustment also makes the overall temperature coefficient effect reduced to 5ppm/ o c except at low value codes where r w dominates. potentiometer mode operations in clude others such as opamp input and feedback resistors network and other voltage scaling applications. a, w, and b terminals can in fact be input or output terminals and have no polarity constraint provided that |v ab |, |v wa |, and |v wb | do not exceed vdd-to-gnd. controlling inputs all pu and pd inputs are protected with a series input resistor and parallel zener esd structure shown in figure 14. 100k : v dd decode & debounce ckt pu figure 14. equivalent esd protection in pu and pd pins terminal voltage operation range the ad5228 is designed with inter nal esd diodes for protection but they also set the voltage bo undary of the terminal operating voltages. positive signals present on terminal a, b, or w that exceeds v dd will be clamped by the forward biased diode. there is no polarity constraint between v a , v w , and v b but they cannot be higher than v dd or lower than gnd. v dd a w b gnd figure 15. maximum terminal voltages set by v dd and gnd power-up and power-down sequences since there are esd protection diodes that limit the voltage compliance at terminals a, b, and w (figure 15), it is important to power v dd before applying any voltage to terminals a, b, and w. otherwise, the diodes will be forward biased such that v dd will be powered unintentionally and may affect the rest of the users circuit. similarly, v dd should be powered down last. the ideal power-up sequence is in the following order: gnd, v dd , digital inputs, and v a/b/w . the order of powering v a , v b , v w , and digital inputs is not important as long as they are powered after v dd . layout and power supply biasing it is always a good practice to employ compact, minimum lead length layout design. the leads to the input should be as direct as possible with a minimum conductor length. ground paths should have low resistance and low inductance. similarly, it is also good practice to bypass the power supplies with quality capacitors. low esr (equivalent series resistance) 1 p f to 10 p f tantalum or electrolytic capacitors should be applied at the supplies to minimize any transient disturbance and filter low frequency ripple. figure 16 illustrates the basic supply-bypassing configuration for the ad5228 ad5228 figure 16. power supply bypassing the ground pin of the ad5228 is a digital ground reference . to minimize the digital ground bounce, the ad5228 ground terminal should be joined remotely to the common ground, figure 16.
preliminary technical data ad5228 rev. pr e 1/20/2004 9 applications constant bias to retain resistance setting for users who consider eemem pots but cannot justify the additional cost for their designs, they may consider ad5228 as low cost alternatives. they may constantly bias the ad5228 with the supply to retain the resistance setting. ad5228 is designed specifically with low power in mind that allows power conservation even in the battery-operated systems. as shown in figure 17, a similar low power digital pot is applied in a 3.4v 450mahour li-ion cellphone battery. the measurement shows that the device drains negligible power. constantly bias the pot is not an impractical approach because most of the portable devices nowadays do not require detachable batteries for charging purpose. although the resistance setting of ad5228 will be lost when the battery needs replacement, such event occurs infrequently that such inconvenience is justified for most applications. and when it happens, user should be provided with a mean to adjust the setting accordingly. 3.40 3.41 3.42 3.43 3.44 3.45 3.46 3.47 3.48 3.49 3.50 024681012 days battery voltage (v) t a = 25 o c figure 17. battery consumption measurement.
preliminary technical data ad5228 rev. pr e 1/20/2004 10 outline dimensions dimensions shown in inches and (mm) 1 3 5 6 2 8 4 7 2.90 bsc pin 1 1.60 bsc 1.95 bsc 0.65 bsc 0.36 0.22 0.90 0.84 seating plane 1.00 ma x 0.20 0.12 0.5 0 0.3 0 8 0 2.80 bsc figure 18. 8-lead small outline tran sistor package [thin sot-23] (uj-8) dimensions shown in millimeters table 1. ordering guide model 1 r ab (k : ) temperature range package code package description full container quantity brand ad5228buj10-R7 10 -40 o c to +105 o c uj sot23-8 3000 d3k ad5228buj10 10 -40 o c to +105 o c uj sot23-8 250 d3k ad5228buj50-R7 50 -40 o c to +105 o c uj sot23-8 3000 d3l ad5228buj50 50 -40 o c to +105 o c uj sot23-8 250 d3l ad5228buj100-R7 100 -40 o c to +105 o c uj sot23-8 3000 d3m ad5228buj100 100 -40 o c to +105 o c uj sot23-8 250 d3m ad5228eval 10 1 1. z=pb free parts the end-to-end resistance rab is available in 10k : , 50k : , and 100k : . the final three characters of the part number determine the nominal resistance value, e.g., 10k : =10.
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